How to Maximize Count Rate

By default, a digital filter is applied to each encoder input. This digital filter requires that an encoder input (channel A+, A-, B+, B-) be stable for 4 clock cycles (160 nanoseconds) before a transition is recognized. Encoder input states lasting less than 4 clock cycles are filtered out. This means that the absolute maximum encoder rate is 12.5 million counts/sec (12.5MHz) when digital filtering is enabled.

For maximum count rate, the encoder filter should be disabled. Setting the FilterDisable bit in the feedbackQuadrature configuration register will allow a maximum of 50 MHz for FPGA versions x0400 and later (FPGA versions x0346 and prior have a maximum of 25 MHz).

The digital filters can be turned off from Motion Console. Set the Primary Encoder Filter to disable under the Motor Summary window, Config tab.

A separate control is provided for the Secondary Encoder Filter.
NOTE: These filters only apply to quadrature feedback modules in the SynqNet FPGA (not to other feedback types including any drive feedback).

MPI

The encoder filter can be controlled via MPIMotorEncoder.

Sample Application - countRate.c

For an example of changing the encoder filter with service commands, see countRate.c. This program will allow you to maximize or minimize the encoder rate by specifying '-countrate max' or '-countrate min' in the command line.

-node #	To change the node number.
-motor #	To change the motor number.
-countrate max	To maximize the encoder rate. NOTE: Unless otherwise specified, it maximizes the primary encoder rate on motor 0, node 0 on the network.
-countrate min	To minimize the encoder rate. NOTE: Unless otherwise specified, it maximizes the primary encoder rate on motor 0, node 0 on the network.
-encoder primary	To change to the primary encoder.
-encoder secondary	To change to the secondary encoder.
-all true	To maximize the encoder rate on all axes.

Configuring the FilterDisable bit

Configuring the FilterDisable bit can also be done using the Service Command utility.

For Motor 0
primary encoder: sqcmd -write -addr 0x00020000 -data 0x2
secondary encoder: sqcmd -write -addr 0x00028000 -data 0x2

For Motor 1
primary encoder: sqcmd -write -addr 0x01020000 -data 0x2
secondary encoder: sqcmd -write -addr 0x01028000 -data 0x2

For Motor 2
primary encoder: sqcmd -write -addr 0x02020000 -data 0x2
secondary encoder: sqcmd -write -addr 0x02028000 -data 0x2

For Motor 3
primary encoder: sqcmd -write -addr 0x03020000 -data 0x2
secondary encoder: sqcmd -write -addr 0x03028000 -data 0x2

NOTE: The RMB-10V2 only has 1 secondary encoder. See the RMB-10V2 FPGA Table for details.

The screenshot below is an example of maximizing the encoder rate on motor 0.

NOTE: The first command would read address 0x020000 (motor 0). Be sure to keep the other bit configurations when you disable the filter bit (by writing 0x2).