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General Purpose Motor I/O

There are up to 32 general purpose I/O signals associated with each drive/motor on a SynqNet node. However, many nodes do not support all 32 I/O signals. These I/O signals can either be an input, output or are sometimes software configurable as either an input/output.

Signals that can be outputs can either be controlled by the user, or the node may allow the output to be a motion specific function, such as a stepper output signal.

For example, Motor 1 on an RMB-10V2 node from MEI (using the C0FE0029 FPGA) supports the following general purpose I/O bits.

Bit
Description
Supported
Direction
Motor 0
External Pins
on J0_1
0
XCVR_A
Y
Selectable
15 & 49
1
XCVR_B
Y
Selectable
16 & 50
2
XCVR_C
Y
Selectable
17 & 51
3
N
4
N
5
N
6
USER_0_IN
Y
IN only
14 &48
7
USER_0_OUT
Y
OUT only
14 &48
8-31
N

Each of the general purpose I/O signals supported by a node has a structure similar to the following diagram.

The I/O signal can either be directly controlled from the output register or monitored with the input register. There are a maximum of 15 other sources that could drive an output pin, although most node types do not have this many internal sources available. The internal feature of the node that could drive each of these sources is dependant upon the node's design and loaded SynqNet FPGA version.

Getting Information about General Purpose I/O

The MPIMotorInfo structure returned from a call to the mpiMotorInfo(...) function returns data about what general purpose I/O is supported and which configuration options are valid for each general purpose I/O signal.

typedef struct MPIMotorInfoGeneralIO {
long supported;
char *name;
MPIMotorIoTypeMask validTypes;
} MPIMotorInfoGeneralIO;

struct MPIMotorInfo {
...
MPIMotorInfoGeneralIO generalIO[MPIMotorGeneralIoLAST];
}

The name field gives the name of the node used for this I/O pin.
The validTypes field returns a bitmap where each true bit indicates that the source type is valid for this motor/node. The following enumerations can be used to decode the validTypes field.

typedef enum MPIMotorIoType {

MPIMotorIoTypeOUTPUT,

MPIMotorIoTypePULSE_A,
MPIMotorIoTypePULSE_B,
MPIMotorIoTypeCOMPARE_0,
MPIMotorIoTypeCOMPARE_1,
MPIMotorIoTypeSOURCE5
MPIMotorIoTypeBRAKE,

MPIMotorIoTypeSSI_CLOCK0,
MPIMotorIoTypeSSI_CLOCK1,

MPIMotorIoTypeSOURCE9,
MPIMotorIoTypeSOURCE10,
MPIMotorIoTypeSOURCE11,
MPIMotorIoTypeSOURCE12,
MPIMotorIoTypeSOURCE13,
MPIMotorIoTypeSOURCE14,
MPIMotorIoTypeSOURCE15,

MPIMotorIoTypeINPUT,

MPIMotorIoTypeSOURCE1 = MPIMotorIoTypePULSE_A,
MPIMotorIoTypeSOURCE2 = MPIMotorIoTypePULSE_B,
MPIMotorIoTypeSOURCE3 = MPIMotorIoTypeCOMPARE_0,
MPIMotorIoTypeSOURCE4 = MPIMotorIoTypeCOMPARE_1,

MPIMotorIoTypeSOURCE6 = MPIMotorIoTypeBRAKE,
MPIMotorIoTypeSOURCE7 = MPIMotorIoTypeSSI_CLOCK0,
MPIMotorIoTypeSOURCE8 = MPIMotorIoTypeSSI_CLOCK1,
} MPIMotorIoType;

typedef enum MPIMotorIoTypeMask {
MPIMotorIoTypeMaskOUTPUT = (1<<MPIMotorIoTypeOUTPUT),
MPIMotorIoTypeMaskSOURCE1 = (1<<MPIMotorIoTypeSOURCE1),
MPIMotorIoTypeMaskSOURCE2 = (1<<MPIMotorIoTypeSOURCE2),
MPIMotorIoTypeMaskSOURCE3 = (1<<MPIMotorIoTypeSOURCE3),
MPIMotorIoTypeMaskSOURCE4 = (1<<MPIMotorIoTypeSOURCE4),
MPIMotorIoTypeMaskSOURCE5 = (1<<MPIMotorIoTypeSOURCE5),
MPIMotorIoTypeMaskSOURCE6 = (1<<MPIMotorIoTypeSOURCE6),
MPIMotorIoTypeMaskSOURCE7 = (1<<MPIMotorIoTypeSOURCE7),
MPIMotorIoTypeMaskSOURCE8 = (1<<MPIMotorIoTypeSOURCE8),
MPIMotorIoTypeMaskSOURCE9 = (1<<MPIMotorIoTypeSOURCE9),
MPIMotorIoTypeMaskSOURCE10 = (1<<MPIMotorIoTypeSOURCE10),
MPIMotorIoTypeMaskSOURCE11 = (1<<MPIMotorIoTypeSOURCE11),
MPIMotorIoTypeMaskSOURCE12 = (1<<MPIMotorIoTypeSOURCE12),
MPIMotorIoTypeMaskSOURCE13 = (1<<MPIMotorIoTypeSOURCE13),
MPIMotorIoTypeMaskSOURCE14 = (1<<MPIMotorIoTypeSOURCE14),
MPIMotorIoTypeMaskSOURCE15 = (1<<MPIMotorIoTypeSOURCE15),

MPIMotorIoTypeMaskINPUT = (1<<MPIMotorIoTypeINPUT),

MPIMotorIoTypeMaskPULSE_A = (1<<MPIMotorIoTypePULSE_A),
MPIMotorIoTypeMaskPULSE_B = (1<<MPIMotorIoTypePULSE_B),
MPIMotorIoTypeMaskCOMPARE_0 = (1<<MPIMotorIoTypeCOMPARE_0),
MPIMotorIoTypeMaskCOMPARE_1 = (1<<MPIMotorIoTypeCOMPARE_1),
MPIMotorIoTypeMaskBRAKE = (1<<MPIMotorIoTypeBRAKE),
MPIMotorIoTypeMaskSSI_CLOCK0 = (1<<MPIMotorIoTypeSSI_CLOCK0),
MPIMotorIoTypeMaskSSI_CLOCK1 = (1<<MPIMotorIoTypeSSI_CLOCK1),
} MPIMotorIoTypeMask;


For example, calling the mpiMotorInfo(...) function for Motor 1 on an RMB-10V2 node would return the following data:

General I/O Bit
Supported
Name
validTypes
motorInfo.generalIO[0].supported
1
XCVR A 0x00010027
motorInfo.generalIO[1].supported
1
XCVR B 0x00010027
motorInfo.generalIO[2].supported
1
XCVR C 0x00010027
motorInfo.generalIO[3].supported
0
0
motorInfo.generalIO[4].supported
0
0
motorInfo.generalIO[5].supported
0
0
motorInfo.generalIO[6].supported
1
User In 0 0x00010000
motorInfo.generalIO[7].supported
1
User Out 0 0x00010027
motorInfo.generalIO[8].supported
0
0
motorInfo.generalIO[9].supported
-
motorInfo.generalIO[31].supported
0
0

Configuring the General Purpose I/O

The type/source control of the I/O mux. for each general purpose I/O is configured with the MPIMotorIoConfig fields in the MPIMotorConfig structure.

For example, here is the MPI code used to set the first general purpose I/O pin as an output that is driven by the internal brake signal:

MPIMotorConfig motorConfig;
mpiMotorConfigGet( motor0, NULL, &motorConfig );

motorConfig.Io[0].Type = MPIMotorIoTypeBRAKE;

mpiMotorConfigSet( motor0, NULL, &motorConfig );

Accessing the General Purpose I/O

To access the general purpose I/O associated with a motor the following set of functions are available. For accessing general purpose I/O as a set, you can use:
- mpiMotorGeneralIn
- mpiMotorGeneralOutSet
- mpiMotorGeneralOutGet

These functions take two arguments, bitStart and bitCount, which allow either a single bit to be accessed (bitCount equals one) or multiple adjacent I/O bits to be accessed (bitCount greater than one).

The following code shows how to get the state of general purpose input 0.

long x;
mpiMotorGeneralIn( motor0, 0, 1, &x );

The next piece of code shows how to get the state of all the general purpose outputs:

long x;
mpiMotorGeneralOutGet( motor0, 0, MPIMotorGeneralIoLAST, &x );

FPGA I/O Bitmapping

Each SynqNet drive supports different FPGA I/O Bitmapping. Please select a drive from the menu below to see the supported general purpose I/O bits for that particular drive. If the SynqNet drive you are using is not listed, refer to our SynqNet Drives page for more information.


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