MEIFilterForm
Definition

typedef enum{
MEIFilterFormIIR,
MEIFilterFormBIQUAD,
MEIFilterFormSS_BIQUAD,
MEIFilterFormINT_BIQUAD,
MEIFilterFormINT_SS_BIQUAD,
} MEIFilterForm;

Description
MEIFilterForm describes the form that a digital filter takes on the controller. Please note that the equations listed below use the coefficients loaded onto the controller, not necessarily the coefficients used by the MPI. A user may specify a low pass filter with only a single parameter (the breakpoint) and request that the form of the filter be a spacestate biquad form on the controller.
Digital filtering on the XMP is accomplished through 32bit words. This equates to the use of single precision floating point numbers  a 24bit mantissa or about 7 decimal places of accuracy. This lack of precision can cause errors in the filtering process normally appearing as DC gain shifts or limit cycling, this especially true when the filter requires more than one section, a 6th order low pass filter would be one example. Filter forms using integer math can provide more internal precision for coefficients and internal registers but at the cost of less dynamic range. Filter forms using integer math take more processing time for the controller and can potentially limit the maximum sample rate of the controller.
The statespace (SS) filter forms allow the scaling of the input and the output, whereas the nonstatespace forms only allow output scaling. This helps to prevent the loss of precision of the internal registers while still maintaining a very large dynamic range. Filter forms using statespace forms take more processing time for the controller and can potentially limit the maximum sample rate of the controller. However, a noninteger statespace filter form takes less processing power than an integer nonstatespace filter form.

MEIFilterFormIIR 
Deprecated. Cascaded biquad sections offer better precision and better calculation performance. 
MEIFilterFormBIQUAD 
Second Order digital filter form, for implementing low/high pass, notch, lead/lag and custom filters. The filter is a single precision floating point canonical form. The biquad filter is defined by the following discrete transfer function:
The XMP's representation of this filter is:
w0: Intermediate result
u(k): filter input
a1, a2, b0, b1, and b2: discrete biquad coefficients
y(k):filter output
x1k and x2k: filter states 
MEIFilterFormSS_BIQUAD 
Second order digital filter form, for implementing low/high pass, notch, lead/lag and custom filters. The filter is a single precision, floating point state space implementation. This filter applies input and output scaling to the canonical form. The XMP's state space representation of this filter is:
u(k): filter input
d1, c1, c2, a2, a1,b1: discrete biquad coefficients
y(k):filter output
p1k and p2k: filter states 
MEIFilterFormINT_BIQUAD 
Second Order digital filter form, for implementing low/high pass, notch, lead/lag and custom filters. The filter is a fixed point canonical form state space implementation. This form is a fixed point implementation of the floating point form MEIFilterFormBIQUAD. See the definition of MEIFilterFormBIQUAD above for the defining equations for this filter.
The input coefficients for this filter (b0, b1, b2, a1 and a2) should all be greater than 2, and less than 2. The coefficients are represented as 32 bit 2's complement, with 1=2^30. The coefficient's numerical format is 1.29 (1 bit whole, 29 bits fractional), and the controller uses an 80 bit accumulator. Only the 32 bit result of the multiplication is output from each section. 
MEIFilterFormINT_SS_BIQUAD 
Second Order digital filter form, for implementing low/high pass, notch, lead/lag and custom filters. The filter is a fixed point canonical form state space implementation. This form is a fixed point implementation of the floating point form MEIFilterFormSS_BIQUAD. See the definition of MEIFilterFormSS_BIQUAD above for the defining equations for this filter.
The input coefficients for this filter (d1, c1, c2, a2, a1 and b1) should all be greater than 2, and less than 2. The coefficients are represented as 32 bit 2's complement, with 1=2^30. The coefficient's numerical format is 1.29 (1 bit whole, 29 bits fractional), and the controller uses an 80 bit accumulator. Only the 32 bit result of the multiplication is output from each section. 

See Also
MEIPostfilterSection
