SQIO: System Limitations
I/O Capacity
SynqNet controllers support up to 32 nodes and up to 32 motors. Therefore, up to 32 SQIO nodes are allowed.
I/O Capacity
Each SPI bus on the SQID can support up to 256 bits. Therefore, in the standard scheme there can be up to 256 digital inputs, up to 256 digital outputs, 16 sixteenbit ADC channels, and 16 sixteenbit DAC channels attached to each SQID. The MPI will check the setup at initialization to verify compatibility and report an error if it is not valid.
Board Modules
Up to eight board modules can be connected together; this is a constraint of the I^{2}C^{2} EEPROM addressing scheme.
Power
+24V
A fuse limits the current drawn to 2A, therefore the following inequality must be satisfied:
(d * 0.02) + (a * 0.10) + (m * 0.20) + 0.06 < 2
where, d = number of DIN32DOUT32 modules
a = number of ADC4DAC4 modules
m = number of MIXEDMODULE1 modules
+3.3V
The SQID's 5W DCDC converter has 800mA of spare capacity, therefore the following inequality must be satisfied:
(d * 0.05) + (a * 0.12) + (m * 0.65) < 0.8
where, d = number of DIN32DOUT32 modules
a = number of ADC4DAC4 modules
m = number of MIXEDMODULE1 modules
