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Drive FPGA Table:
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| Parameter | Specification |
|---|---|
| Node Type | 0x00030010 |
| Option | 0x00000000 |
| FPGA | 0xC0FE0027 |
| Motor Count | 1 |
| Drive Count | 1 |
| Secondary Encoder Count | 1 |
| SqNode Digital Out Count | 0 |
| SqNode Digital In Count | 0 |
| SqNode Analog In Count | 0 |
| SqNode Analog Out Count | 0
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| Parameter | Number |
|---|---|
| Capture Count | 1 |
| Probe Count | 1 |
| Pulse Count | 0 |
| Parameter | Supported? |
|---|---|
| Dedicated In 0 - Amp Fault | Y |
| Dedicated In 1 - Brake Applied | Y |
| Dedicated In 2 - Home | Y |
| Dedicated In 3 - Limit HW Pos | Y |
| Dedicated In 4 - Limit HW Neg | Y |
| Dedicated In 5 - Index Primary | Y |
| Dedicated In 6 - FeedbackFault | Y |
| Dedicated In 7 - Captured | N |
| Dedicated In 8 - Hall A | Y |
| Dedicated In 9 - Hall B | Y |
| Dedicated In 10 - Hall C | Y |
| Dedicated In 11 - Amp Active | Y |
| Dedicated In 12 - Index Secondary | Y |
| Dedicated In 13 - Warning | Y |
| Dedicated In 14 - Drive Status 9 | N |
| Dedicated In 15 - Drive Status 10 | N |
| Dedicated Out 0 - Amp Enable | Y |
| Dedicated Out 1 - Brake Release | Y |
| General Purpose I/O Bit |
Name | Valid Configurations |
|---|---|---|
| 0 | DIFF_I_01 | Output, Brake, Input |
| 1 | DIFF_I_02 | Output, Brake, Input |
| 2 | FPGA_DIV_BY_N | Output, Brake |
| 3 | IN_04 | Input |
| 4 | IN_05 | Input |
| 5 | IN_06 | Input |
| 6 | IN_07 | Input |
| 7 | IN_08 | Input |
| 8 | IN_09 | Input |
| 9 | IN_10 | Input |
| 10 | IN_11 | Input |
| 11 | DOUT1 | Output, Brake |
| 12 | DOUT2 | Output, Brake |
| 13 | DOUT3 | Output, Brake |
| 14 | DOUT4 | Output, Brake |
| 15 | DOUT5 | Output, Brake |
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