.

DSP-CPCI: Rear I/O Bus J5

 

For Header Locations:


* - Column F is the gold-plated grounding strip on the outside edge of the shroud. F1-F22 are grounds.

Pin
E
D
C
B
A
22
Analog in 3 Analog in 2 Analog Gnd Analog in 1 Analog in 0
21
Analog in 7 Analog in 6 Analog Gnd Analog in 5 Analog in 4
20
Reserved Reserved –12V Analog Out Ref(0) +/- 10V Analog Out(0)
19
Reserved Reserved Analog Gnd Analog Out Ref(1) +/- 10V Analog Out(1)
18
Reserved Reserved +12V Analog Out Ref(2) +/- 10V Analog Out(2)
17
Reserved Reserved Analog Gnd Analog Out Ref(3) +/- 10V Analog Out(3)
16
Reserved Reserved Reserved Analog Out Ref(4) +/- 10V Analog Out(4)
15
Reserved Reserved Reserved Analog Out Ref(5) +/- 10V Analog Out(5)
14
Reserved Reserved +5V Analog Out Ref(6) +/- 10V Analog Out(6)
13
Reserved Reserved Gnd Analog Out Ref(7) +/- 10V Analog Out(7)
12
Out 2 Out 1 Out 0 Gate 0 Clock 0
11
Direction(7)+ Step Pulse(0)– Step Pulse(0)+ Direction(0)– Direction(0)+
10
Direction(7)– Step Pulse(1)– Step Pulse(1)+ Direction(1)– Direction(1)+
9
Step Pulse(7)+ Step Pulse(2)– Step Pulse(2)+ Direction(2)– Direction(2)+
8
Step Pulse(7)– Step Pulse(3)– Step Pulse(3)+ Direction(3)– Direction(3)+
7
Reserved Step Pulse(4)– Step Pulse(4)+ Direction(4)– Direction(4)+
6
Encoder Index(0)+ Step Pulse(5)– Step Pulse(5)+ Direction(5)– Direction(5)+
5
Encoder Index(0)– Step Pulse(6)– Step Pulse(6)+ Direction(6)– Direction(6)+
4
Encoder Index(1)+ Encoder B(0)– Encoder B(0)+ Encoder A(0)– Encoder A(0)+
3
Encoder Index(1)– Encoder B(1)– Encoder B(1)+ Encoder A(1)– Encoder A(1)+
2
Encoder Index(2)+ Encoder B(2)– Encoder B(2)+ Encoder A(2)– Encoder A(2)+
1
Encoder Index(2)– Encoder B(3)– Encoder B(3)+ Encoder A(3)– Encoder A(3)+
Pin
E
D
C
B
A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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