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Release Note
C0FE0037_xxxx.sff

MPI Version
FPGA Version
03.03.00
Production Release
C0FE0037_0346

  Table of Contents
     
    Changes and Bug Fixes
     

C0FE0037_0400
     Remove drive reset complete from the fault and fault mask registers - General Change - FP466 
     The watchdog fault was incorrectly being cleared after being activated - Bug Fix- FP465
     sqMac Version 0300 - New Feature - FP407
     Latch added on the notAmpPowered bit - General Change - FP402
     Support for a maximum count rate of 50MHz without filters - New Feature - FP337

C0FE0037_0346
     Modifications to gpioPinConfigReg - General Change - FP336
     Intermittent Dual String Discovery failure - Bug Fix - FP332
     sqMac - 0x00 will be read for dataType NULL - New Feature - FP323
     Intermittent Fault Recovery failures - Bug Fix - FP315
     Problems with quadrature encoder feedback - Bug Fix - FP297


C0FE0037_0400

  Remove drive reset complete from the fault and fault mask registers
    Reference Number: FP 466
    Type: General Change
    FPGA Version: 0x0400
    Problem/Cause:
As more drives require a driveBootComplete bit to indicate when they are finished booting, it was necessary to change the current bit to a more ideal location.
   

Fix/Solution:
The FPGA bit, driveResetComplete, has been removed from the dedicatedIo Fault and Fault Mask registers. This bit has been replaced with driveBootComplete in the dedicatedIo Config register. This bit is monitored solely by the sqNodeLib utility. It is currently not visible through MPI calls or through Motion Console.
NOTE: This change causes compatibility issues between new FPGAs and old software (or old FPGAs with new software). FPGA version x0400 and later require the 03.04.00 MPI software release and later.


  The watchdog fault was incorrectly being cleared after being activated
    Reference Number: FP 465
    Type: Bug Fix
    FPGA Version: 0x0400
    Problem/Cause:
The Slice I/O watchdog fault was incorrectly being cleared after being activated. If a watchdog fault occurred, the FPGA would send a stop command to all slices to halt cyclic operation. As a result of being in this stop mode, it would cause the watchdog fault to be disabled and incorrectly clear itself. Therefore, the fault would never be seen.
   

Fix/Solution:
The FPGA was changed so that if the watchdog fault was the trigger to enter into the stop mode, the watchdog fault would not disable itself, thus allowing the fault to stay latched and also trigger the nodeIo fault.


  sqMac Version 0300
    Reference Number: FP 407
    Type: New Feature
    FPGA Version: 0x0400
   

Description:
The sqNode x0400 FPGA release introduces an upgraded network module, sqMac version 0300. Upgraded features include:

  • SynqNet HotReplace - allows one or more more nodes to be shutdown, replaced, and brought back on-line without interrupting other nodes.
  • Revised Cable Length Discovery - a new node-to-node method was added to make discovery more accurate.
  • sqPll shutdown - a controlled shutdown of individual nodes for HotReplace.

The sqMac 0300 version is NOT fully compatible with MPI versions prior to 03.04.00. Using 0300 sqMac with older software (for some configurations) might cause the "idle cable" check function to accidently corrupt normal packet traffic. But, the MPI will issue a warning if old/new FPGA/MPI are mixed by accident.


  Latch added on the notAmpPowered bit
    Reference Number: FP 402
    Type: General Change
    FPGA Version: 0x0400
    Problem/Cause:
In FPGA versions previous to 0x0400, the notAmpPowered fault bit was not latched.
   

Fix/Solution:
In FPGA versions 0x0400 and later, the notAmpPowered fault bit is now latched. If active, it can be cleared by writing a "1" to bit 5 of the dedicatedIo fault status register.


  Support for a maximum count rate of 50MHz without filters
    Reference Number: FP 337
    Type: New Feature
    FPGA Version: 0x0347; 0x0400
   

Description:
In FPGAs 0x0347, 0x0400, and later, the maximum quadrature encoder count rate has been improved to be 50MHz. In previous FPGA releases, the maximum count rate was 25MHz.

 

C0FE0037_0346

  Modications to gpioPinConfigReg
    Reference Number: FP 336
    Type: General Change
    FPGA Version: 0x0346
    Problem/Cause:
Prior to FPGA version x0346, gpio pins that were configured as an "output" did not resume "output" direction after an ioAbort event. Also, during the ioAbort event, if a service channel write to the gpio configuration register occurred, the gpio "output" pins would be set to "output" mode momentarily (and then cleared to "input" mode by the ioAbort event). After the ioAbort event was cleared, the gpio pin state would remain as in "input" mode unless software restored the gpio configuration register again.
   

Fix/Solution:
In FPGA version x0346 and later, an ioAbort event still forces gpio "output" pins to "input" mode, which allows external resistors to pull pins from either high or low for a "safe" state. The resistors may or may not be present depending on the PCB assembly. However, during an ioAbort event, service writes to the gpio configuration register no longer cause momentary "output" direction. After the ioAbort event is cleared, gpio pins will resume their previous "output" state without software intervention.


  Intermittent Dual String Discovery Failure
    Reference Number: FP 332
    Type: Bug Fix
    FPGA Version: 0x0346
    Problem/Cause:
Probe, resetRequest, and resetComplete were repeated on the wrong port (OUT port) when using the OUT port as the primary port during SynqNet node discovery. As a result, SynqNet node discovery may have failed. This problem was caused by the probe, resetRequest, and resetComplete being repeated on the wrong port. This issue existed in all FPGA versions prior to x0346.
   

Fix/Solution:
The FPGA code was corrected in version x0346 and later releases. This fix is required for systems using the Dual String or IN Port String topologies. This fix is NOT required for systems using normal OUT Port String or Ring topologies.


  sqMac - 0x00 will be read for dataType NULL
    Reference Number: FP 323
    Type: New Feature
    FPGA Version: 0x0346
   

Description:
0x00 will be read for dataType NULL in the status and feedback packets.


  Intermittent Fault Recovery failures
    Reference Number: FP 315
    Type: Bug Fix
    FPGA Version: 0x0346
    Problem/Cause:
Some nodes may have intermittently failed to recover from a fault in some network configurations. If a node failed to recover, it exited cyclic operation and correctly triggered ioAbort logic (forcing outputs into "safe" states). Any nodes "downstream" of the failing node (after it switched ports) were also likely to exit cyclic operation. For any given node, there was only a small schedule window where this error may have occurred. There were two causes of the problem. The rcvMiiBuffer did not clear itself after an overflow in some situations. Also, a packet fragment generated by the fault recovery that happened to have valid CRC (but no data) would confuse the packetFifo, and corrupt internal node configuration bits. The first issue existed in FPGA build versions x0341 through x0345 and their branches (MPI release 03.02.00). The second issue existed in all FPGA versions prior to x0346.
   

Fix/Solution:
The fault recovery problems was corrected in FPGA build versions x0346 and later. The rcvMiiBuffer will correctly clear itself after an overflow. The xmitMiiReg will release xmitHoldRcvBuf within 8 clocks after a fault, preventing an rcvMiiBuffer overflow. 8 clocks will guarantee that there is minimum packet spacing between the packets. sqPll will ignore the second SYNQ packet after fault recovery (in case packet delays were effected in the cycle where fault recovery occurred). The rcvMii will correctly handle a valid packet with data length of 0. No software changes are required.


  Problems with quadrature encoder feedback
    Reference Number: FP 297
    Type: Bug Fix
    FPGA Version: 0x0346
    Problem/Cause:
The pins for encA[0] & encB[0] were swapped, causing problems with quadrature encoder feedback. This problem existed for all FPGA versions prior to x0346.
   

Fix/Solution:
The FPGA design was modifed to correct the pinout. This problem was corrected in FPGA version x0346 and later.

 

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