Release Note
C0FE0036_xxxx.sff

Fix/Solution:
The FPGA code was corrected to use the Valid bit. This fix exists in FPGA versions 0x0346_00_02 and later. No software changes are required.

Fix/Solution:
The driveFault bit from the drive may take from 52.4ms to 104.9ms to clear. The FPGA was changed to hold off the DONE bit on this command for 105ms to allow for this variance.

Fix/Solution:
In FPGA version x0346 and later, an ioAbort event still forces gpio "output" pins to "input" mode, which allows external resistors to pull pins from either high or low for a "safe" state. The resistors may or may not be present depending on the PCB assembly. However, during an ioAbort event, service writes to the gpio configuration register no longer cause momentary "output" direction. After the ioAbort event is cleared, gpio pins will resume their previous "output" state without software intervention.

Fix/Solution:
The FPGA code was corrected in version x0346 and later releases. This fix is required for systems using the Dual String or IN Port String topologies. This fix is NOT required for systems using normal OUT Port String or Ring topologies.

Description:
0x00 will be read for dataType NULL in the status and feedback packets.

Fix/Solution:
The fault recovery problems was corrected in FPGA build versions x0346 and later. The rcvMiiBuffer will correctly clear itself after an overflow. The xmitMiiReg will release xmitHoldRcvBuf within 8 clocks after a fault, preventing an rcvMiiBuffer overflow. 8 clocks will guarantee that there is minimum packet spacing between the packets. sqPll will ignore the second SYNQ packet after fault recovery (in case packet delays were effected in the cycle where fault recovery occurred). The rcvMii will correctly handle a valid packet with data length of 0. No software changes are required.

Description:
Changed the pin location for gpio0_z[2] from T10 to G13. Changed the pin location for gpio0_z[13] from K5 to T10. Changed number of gpioBits from 13 to 14. This change applies to FPGA version x0346 and later.

Problem/Cause:
If nodeAlarm is configured to look at the axis fault, and the axis fault is configured to look at driveFault, a race condition would occur making both nodeAlarm and driveFault unclearable. This issue existed in all FPGA versions prior to x0344.

Fix/Solution:
Modified FPGA code for versions x0344 and later. If a driveFault is occurring, nodeAlarm is not written to the drive. This allows for both nodeAlarm and driveFault to be cleared. No software changes are required.

Description:
Add support for multiple packets to the rxMiiBuffer. This improves tolerance to network jitter. Prior to version x0341, the rxMiiBuffer could absorb up to 32 clocks (1.28 µS) of delay for a single packet, but only 8 clocks for multiple packets with minimum spacing. This change is required to meet theoretical worst-case network jitter in large networks (32 nodes). The improvement may also help at network startup, since the node's PLL phase error is larger than normal (as the PLL pulls into nominal lock). No software changes are required.

Description:
Release new FPGA type C0FE0036_0341.sff.

Description:
Add BranchRev register. This extends the existing 16 bits of FPGA version number with 8 bits of branch and 8 bits of revision ID.